The implementation of three-dimensional (3D) stacking in microelectronics generally requires precise alignment of the plurality of devices being assembled. Various techniques have been demonstrated which vary based on the type of devices and how they are being assembled. In some cases, alignment is accomplished with standard alignment techniques because patterns on two parts are easily accessed and overlaid to each other. In other cases it is not possible to directly align the features, so other techniques must be used. Split optics is sometimes used to align two parts which do not have direct overlay capability. Split optics is a precision system using mirrors to project features from one part onto features from a second part. The technique requires a special tool which is maintained to be accurate. As this technique aligns only two parts at a time, it requires multiple alignments to align a plurality of parts, and therefore is slow for more than a small number, e.g. two to three parts.
To align large quantities of parts, e.g., more than three parts, edge banking is often used. In this technique edges of parts are banked against a common edge to provide a mechanical alignment. This technique allows many parts to be aligned quickly at one time. Unfortunately this technique is subject to alignment error and has issues with repeatability. The biggest challenge is that it requires that the banking edge be accurately aligned to the patterns. Generally the edge is defined by wafer dicing, which is known to have variable edge accuracy based on dicing blade width, stage precision, and edge chipping. This technique also requires some mechanism to maintain intimate contact with the common edge to ensure gaps do not form as additional parts are added or as the assembly goes through additional processes.
Another technique involves aligning each individual part to a secondary reference part. An optical alignment system is also required for this technique, for example a split optics system or other system which allows two separate images to be overlayed. This would be separate from the main assembly, but is referenced to the main assembly. This technique suffers from slow throughput and has issues with accuracy and calibration of the alignment system.